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%$Author: saulius $
%$Date: 2020-06-04 14:58:32 +0300 (Thu, 04 Jun 2020) $ 
%$Revision: 1524 $
%$URL: svn+ssh://saulius-grazulis.lt/home/saulius/svn-repositories/seminarai/2020-verifikacjos-seminarui/slides.tex $
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%%BEGIN LANGUAGE en
\title{Discussion of the Intermediate test}
%%END LANGUAGE en


\author{Saulius Gražulis}

\date{Vilnius, 2020}

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\begin{document}

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\begin{frame}
    \titlepage

\input{affiliation}
    
    \begin{center}
      \mbox{}
      \hfill\hfill\hfill
      \includegraphics[height=1.5cm]{images/sp_VU_zenklas.eps}
      \hfill
      \includegraphics[height=1.5cm]{images/2019-05-02_Melynas_MIF-zenklas242x244.png}
      \hfill\hfill\hfill
      \mbox{}
    \end{center}

    \vfill

    %% \tiny
    %% \RCSid{
    %%   $Id: slides.tex 1524 2020-06-04 11:58:32Z saulius $
    %% }
    \begin{flushright}
      \begin{minipage}[c]{0.67\textwidth}
        \tiny\raggedright
        %%BEGIN LANGUAGE en
        This set of slides may be copied and used as specified in the
        %%END LANGUAGE en
        \myhref{http://creativecommons.org/licenses/by-sa/4.0/}{Attribution-ShareAlike
          4.0 International}
license
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      \end{minipage}
    \end{flushright}

\end{frame}

%==============================================================================

\begin{frame}
\frametitle{XOR gate}

  \begin{center}
    \parbox[c]{3cm}{
      \includegraphics[width=\linewidth]{drawings/logic-gates/XOR-A0-B0.png}
    }
    \hspace{1em}
    \begin{tabular}{cc|c}
      \textbf{A} & \textbf{B} & \textbf{X}
      \\
      \hline
      0 & 0 & 0 \\
      0 & 1 & 1 \\
      1 & 0 & 1 \\
      1 & 1 & 0 \\
    \end{tabular}
  \end{center}

Three interpretations:
  
  \begin{enumerate}
  \item
One and only only one input active

  \item
Odd number of inputs active

  \item
Inputs are not equivalent
    
  \end{enumerate}

All tree interpretations are the same for 2 inputs...
  
\end{frame}

%------------------------------------------------------------------------------

\begin{frame}
\frametitle{Multi-input XOR gate}

... but not for 3 and more inputs ...
  
  \begin{center}
    \parbox[c]{3cm}{
      \includegraphics[width=\linewidth]{drawings/logic-gates/3-input-XOR-all-1.png}
    }

    \footnotesize
    \begin{tabular}{ccc|c|c|c|}
      \hline
      \textbf{A} & \textbf{B} & \textbf{C} &
      \multicolumn{3}{c|}{
        \textbf{X}
      }
      \\
      \hline
      &&&
One of three
      &
Odd no. of inputs
      &
Non-equivalence
      \\
      &&&
      XOR\footnote{\tiny Logisim}
      &
      $A \oplus B \oplus C$\footnote{\tiny
Circuit manufacturers
      }
      &
      $A \not\equiv B \lor B \not\equiv C$
      \\
      \hline
      0 & 0 & 0 & 0     & 0     & 0 \\
      0 & 0 & 1 & 1     & 1     & 1 \\
      0 & 1 & 0 & 1     & 1     & 1 \\
      0 & 1 & 1 & 0     & 0     & 1 \\
      1 & 0 & 0 & 1     & 1     & 1 \\
      1 & 0 & 1 & 0     & 0     & 1 \\
      1 & 1 & 0 & 0     & 0     & 1 \\
      1 & 1 & 1 & \bf 0 & \bf 1 & 0 \\
      \hline
    \end{tabular}
  \end{center}

\end{frame}

%------------------------------------------------------------------------------

\begin{frame}
\frametitle{IC manufacturer's interpretation}

  $$
  A \oplus B \oplus C
  $$
  
  \begin{center}
    \includegraphics[page=2,width=9cm,trim=1cm 26cm 1cm 2cm,clip]{images/74LVC1G386-3-input-XOR/74LVC1G386.pdf}

    \includegraphics[page=2,width=11cm,trim=1cm 6cm 1cm 13cm,clip]{images/74LVC1G386-3-input-XOR/74LVC1G386.pdf}
  \end{center}
  
\end{frame}

%------------------------------------------------------------------------------

\begin{frame}
\frametitle{IC manufacturer's interpretation}

  $$
  A \oplus B \oplus C
  $$
  
  \begin{center}
    \includegraphics[page=3,width=9cm,trim=1cm 26cm 1cm 2cm,clip]{images/74LVC1G386-3-input-XOR/74LVC1G386.pdf}

    \includegraphics[page=3,width=11cm,trim=1cm 3cm 1cm 18.5cm,clip]{images/74LVC1G386-3-input-XOR/74LVC1G386.pdf}
  \end{center}
  
\end{frame}

%------------------------------------------------------------------------------

\begin{frame}
\frametitle{Logisim interpretation}

  \begin{center}
    \parbox[c]{3cm}{
      \includegraphics[width=\linewidth]{drawings/logic-gates/3-input-XOR-all-1.png}
    }
    \parbox[c]{3cm}{
      \includegraphics[width=\linewidth]{drawings/logic-gates/3-input-odd-parity-all-1.png}
    }
    \parbox[c]{3cm}{
      \includegraphics[width=\linewidth]{drawings/logic-gates/3-input-XOR-as-M2-all-1.png}
    }
  \end{center}
  
  \begin{quote}
    But if there are more than two specified inputs, the XOR gate will
    emit 1 only when there is exactly one 1 input, whereas the Odd
    Parity gate will emit 1 if there are an odd number of 1 inputs.
  \end{quote}
  \rightline{\footnotesize\mywebref{http://www.cburch.com/logisim/docs/2.1.0/libs/gates/xor.html}}

\end{frame}
  
%------------------------------------------------------------------------------

\begin{frame}
\frametitle{Gray codes}

  \begin{center}
    \small
    \begin{tabular}{cccc}
      \hline
      \textbf{
Number
      } & \textbf{
Gray code
      } & \textbf{
Binary positional
      }
      \\
      \hline
      0 & 0000 & 0000 \\
      1 & 0001 & 0001 \\
      2 & 0011 & 0010 \\
      3 & 0010 & 0011 \\
      4 & 0110 & 0100 \\
      5 & 0111 & 0101 \\
      6 & 0101 & 0110 \\
      7 & 0100 & 0111 \\
      8 & 1100 & 1000 \\
      9 & 1101 & 1001 \\
      A & 1111 & 1010 \\
      B & 1110 & 1011 \\
      C & 1010 & 1100 \\
      D & 1011 & 1101 \\
      E & 1001 & 1110 \\
      F & 1000 & 1111 \\
      \hline
    \end{tabular}
  \end{center}

\end{frame}

%------------------------------------------------------------------------------

\begin{frame}
\frametitle{Uses of Gray code}

  \begin{center}
    \includegraphics[width=5cm]{images/Gray-code-encoder/Encoder_Disc_3-Bit.eps}
  \end{center}
  \rightline{\scriptsize\myhref{https://commons.wikimedia.org/w/index.php?curid=801435}{By jjbeard - Encoder\_disc.png, Public Domain}}

\end{frame}

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\lstset{
  keywordstyle=\color{KwdColor},
  commentstyle=\color{CommentColor}\ttfamily,
  identifierstyle=\color{IdentifierColor},
  stringstyle=\color{StringColor},
  basicstyle=\ttfamily
}

\begin{frame}[containsverbatim]
\frametitle{Deciphering assembler}

  \begin{center}
    \begin{minipage}{0.2\textwidth}
      \lstset{language=[Motorola68k]Assembler,morekeywords={LDC,LD,ADDC,SUBC,JNEG,HALT,OUT}}
      \begin{lstlisting}[frame=trBL]
LDC D1
ST  A1
LDC D2
ST  A2
LD  A1
SUB A2
      \end{lstlisting}
    \end{minipage}
    \hspace{1em}
    \begin{minipage}{0.2\textwidth}
      \lstset{language=[Motorola68k]Assembler,morekeywords={LDC,LD,ADDC,SUBC,JNEG,HALT,OUT}}
      \begin{lstlisting}[frame=trBL]
LDC 12
ST  20
LDC 14
ST  21
LD  20
SUB 21
      \end{lstlisting}
    \end{minipage}
  \end{center}

  \begin{minipage}{0.4\textwidth}
    \scriptsize
    \begin{itemize}
    \item $A \leftarrow 12$
    \item $A \rightarrow [20] \text{; [20] is now 12}$
    \item $A \leftarrow 14$
    \item $A \rightarrow [21] \text{; [21] is now 14}$
    \item $A \leftarrow [20]  \text{; A is now 12} $
    \item $A \leftarrow A - [21] \text{; A is now 12 - 14}$
  \end{itemize}
  \end{minipage}
  \hspace{2em}
  \begin{minipage}{0.4\textwidth}
Answer:

    $ 12 - 14 = -2 = \mathrm{FFFE}_{16}$
  \end{minipage}

\end{frame}

%------------------------------------------------------------------------------

\begin{frame}
\frametitle{Active signals during instruction execution}

  Instruction: LDC → opcode: \textbf{02}000B
  
  \begin{center}
    \includegraphics[width=12cm]{drawings/Harvard-CPU-Logisim/data-tract.png}
  \end{center}
  
\end{frame}

%------------------------------------------------------------------------------

\begin{frame}
\frametitle{Conversion of number systems}

  \begin{itemize}
  \item
quaternary (base-4) → hexadecimal

    $$4^2 = 16$$

    \centerline{
      \textcolor{gray}{0}1 21 33 10 22$_4$ → 19F4A$_{16}$
    }
    
  \item
binary → quaternary (base-4)

  \item
ternary → nonary (base-9)

  \end{itemize}

  
\end{frame}

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%% \begin{frame}%%[allowframebreaks]
%%   %%LANGUAGE en \frametitle{References}
%%   %%LANGUAGE lt \frametitle{Šaltiniai}
%%   %%LANGUAGE ru \frametitle{Источники}
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%%   \printbibliography
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%------------------------------------------------------------------------------                                                                                                          
\end{document}
% 2020-11-15 19:30:22 EET
