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%$Author: saulius $
%$Date: 2020-06-04 14:58:32 +0300 (Thu, 04 Jun 2020) $ 
%$Revision: 1524 $
%$URL: svn+ssh://saulius-grazulis.lt/home/saulius/svn-repositories/seminarai/2020-verifikacjos-seminarui/slides.tex $
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%\addbibresource{bibliography/citations.bib}
%% \addbibresource{bibliography/Intel.bib}
\addbibresource{bibliography/Waterman-RISC-V.bib}
\addbibresource{bibliography/RISC.bib}
\addbibresource{bibliography/Patterson-citations.bib}
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%%BEGIN LANGUAGE lt
\title{RISC architektūros}
%%END LANGUAGE lt



\author{Saulius Gražulis}

\date{Vilnius, \the\year}

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    \begin{center}
      \mbox{}
      \hfill\hfill\hfill
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    %%   $Id: slides.tex 1524 2020-06-04 11:58:32Z saulius $
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        \tiny\raggedright
        %%BEGIN LANGUAGE lt
        Šį skaidrių rinkinį galima kopijuoti,
        kaip nurodyta Creative Commons
        %%END LANGUAGE lt
        \myhref{http://creativecommons.org/licenses/by-sa/4.0/}{Attribution-ShareAlike
          4.0 International}
licenzijoje
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%==============================================================================

%% \begin{frame}[allowframebreaks]
%%   %%LANGUAGE en \frametitle{RISC-V}
%%   %%LANGUAGE lt \frametitle{RISC-V}
%%   %%LANGUAGE ru \frametitle{RISC-V}
%% 
%%   \begin{enumerate}
%%   \item RISC vs CISC
%%   \item Uniform instruction size, etc.
%%   \item RISC-V – an open architecture
%%   \item RV sets
%%   \item Registers
%%   \item Special registers
%%   \item Instruction formats
%%   \item Addressing modes
%%   \item Immediate operands; 12-20 split
%%   \item LUI
%%   \item Carry/overflow detection
%%   \item Atomic memory access
%%   \item Multiplications: high/low bytes
%%   \item Short branches, long jumps
%%   \item Subroutine calls; link register
%%   \item Multiprecision arithmetic; SLT
%%   \item Floating point
%%   \item Syscall/Break
%%   \item !!! Pipelines
%%   \item Code density; compressed instr. sets
%%   \item Alignment
%%   \item Vector extensions
%%   \item Notable RISC-V examples
%%   \item Notable RISC examples
%%   \end{enumerate}
%%   
%% \end{frame}

%------------------------------------------------------------------------------

\begin{frame}
\frametitle{x86}

  \only<1>{
    \textcolor{blue}{
Privalumai:
    }
    \begin{itemize}
    \item
Suderinamumas per paskutinius 40 metų
    \item
      %%BEGIN LANGUAGE lt
      Greitas naujo ir seno kodo vykdymas
      %%END LANGUAGE lt
    \item
Greičiausios sistemos
    \end{itemize}
  }
  \only<2>{
    \textcolor{red}{
Trūkumai:
    }
    \begin{itemize}
    \item
Dideli lustai (kristalai)
    \item
Daug tranzistorių – didelė išsklaidoma galia
    \item
Senos funkcijos palaikomos tik dėl suderinamumo
    \item
Funkcijos dubliuojasi
    \item
Daug funkcijų nenaudojamos daugelyje programų
    \item
      %%BEGIN LANGUAGE lt
      Daug specializuotų operacijų or registrų – keblumai kompiliatorių
      konstruktoriams
      %%END LANGUAGE lt
    \end{itemize}

    \vspace{\baselineskip}
    ``AMD’s 80x86 architect, Mike Johnson, famously quipped, “The x86
    really isn’t all that complex—it just doesn’t make a lot of sense”
    \rightline{\mycite{Waterman2016c}}
  } \transdissolve<2>
  
\end{frame}

%------------------------------------------------------------------------------

\begin{frame}
\frametitle{Argumentai RISC naudai}

  \only<1>{
    \begin{itemize}
    \item
      ``Semiconductor memories are both fast and relatively
      inexpensive'' \mycite{Patterson2003}
    \item
      ``it is difficult to have "rational" implementations'' (ibid.)
      \begin{itemize}
      \item
        IBM 370: Peuto and Shustek have discovered that a sequence of
        load instructions is faster than a load multiple instruction for
        fewer than 4 registers; this covers 40\% of cases in typical
        programs \mycite{Patterson2003,Peuto1977}
      \item
        Patterson found that for VAX~11/780 replacing complex INDEX
        instruction (calculates address of an array element, checks
        bounds) by several simple instructions (COMPARE, JUMP LESS
        UNSIGNED, ADD, MUL) can calculate the same function
        \textbf{45\%} faster (in special cases, \textbf{60\%} faster!)
        \mycite{Patterson2003}
      \end{itemize}
    \end{itemize}
  }
  \only<2>{
    \begin{itemize}
    \item
      ``measurements of a particular IBM 360 compiler found that 10
      instructions accounted for 80\% of all instructions executed, 16
      for 90\%, 21 for 95\%, and 30 for 99\%''\footnote{ IBM 360 had 8
        bit opcodes, so would have no more than 256 different
        instructions – with various operands
        (``\myhref{http://bitsavers.org/pdf/ibm/360/princOps/A22-6821-0\_360PrincOps.pdf}{IBM
          System/360 Principles of Operation}'', p.~14) }
      \mycite{Patterson2003,Alexander1975}.
    \item
      ``pushing a register on the stack with \textbf{PUSHL R0} is
      slower than pushing it with the move instruction \textbf{MOVL
        R0,-(SP)} on the VAX 11/78'' \mycite{Patterson2003}
    \end{itemize}
  }

\end{frame}

%------------------------------------------------------------------------------

\begin{frame}
\frametitle{RISC}

  \only<1>{
Techniniai ypatumai:
  }
  \only<2>{
Dizaino principai:
  }
  
  \begin{center}
    \footnotesize
    \renewcommand{\arraystretch}{1.5}
    \only<1>{
      \begin{tabular}{lp{0.3\textwidth}p{0.3\textwidth}}
        \hline
        & RISC & CISC \\
        \hline
        Instructions
        &
        \raggedright
        Simple: Load/Store regs, operations \textbf{only} in regs
        &
        Complex tasks for multiple data types, both in regs and in memory
        \\
        Instr. formats
        &
        \parbox[t]{\linewidth}{
          \raggedright
          Fixed length, two main types: load/store \& \mbox{\texttt{R :=
              R op R}}
        }
        &
        \parbox[t]{\linewidth}{
          \raggedright
          Variable length, may types: load/store, \mbox{\texttt{R := R op R}},
          \mbox{\texttt{R := R op Mem}}, \mbox{\texttt{R := Mem op Mem}}
        }
        \\
        Registers
        &
        16–32 general purpose
        &
        \parbox[t]{\linewidth}{
          \raggedright
          Specialised or 8–16 general purpose

          \vspace{0.5\baselineskip}
        }
        \\
        \hline
      \end{tabular}
    }
    \only<2>{
      \begin{tabular}{lp{0.3\textwidth}p{0.3\textwidth}}
        \hline
        & RISC & CISC \\
        \hline
        Design objective
        &
        \parbox[t]{\linewidth}{
          \raggedright
          Trade off program length, minimise time to execute instruction
        }
        &
        \parbox[t]{\linewidth}{
          \raggedright
          Minimise program length, maximise work/instruction
        }
        \\
        Implementation
        &
        Hard-wired
        &
        Microprogrammed
        \\
        Caching
        &
        Essential (at least for code)
        &
        \parbox[t]{\linewidth}{
          \raggedright
          Useful ($\Rightarrow$ nowadays, essential)
        }
        \\
        Compiler design
        &
        \parbox[t]{\linewidth}{
          \raggedright
          Find best instruction ordering \& register allocation
        }
        &
        \parbox[t]{\linewidth}{
          \raggedright
          Find best/right instructions
        }
        \\
        Philosophy
        &
        \parbox[t]{\linewidth}{
          \raggedright
          Move all (complicated) functions to software
        }
        &
        \parbox[t]{\linewidth}{
          \raggedright
          Move any useful software function into hardware

          \vspace{0.5\baselineskip}
        }
        \\
        \hline
      \end{tabular}
    }
  \end{center}
  \rightline{\scriptsize Adapted from: \mycite{Jamil1995}}
  \transdissolve<2>
  
\end{frame}

%------------------------------------------------------------------------------

\begin{frame}
\frametitle{Kai kurie RISC kompiuteriai}

  \only<1>{
Praeityje...
    
    \begin{center}
      \begin{minipage}{0.45\textwidth}
        \begin{center}
          \includegraphics[height=4.5cm]{images/SGI/800px-SGI_Indigo2_High_Impact_workstation_next_to_an_SGI_Espressigo.jpg}
        \end{center}
      \end{minipage}
      \hspace{1ex}
      \begin{minipage}{0.45\textwidth}
        \begin{center}
          \includegraphics[height=4.5cm]{images/Sun/SPARCstation_1.jpg}
        \end{center}
      \end{minipage}
    \end{center}
  }

  \only<2>{
Ir, tikriausiai, ateityje...

    \begin{center}
      \begin{minipage}{0.3\textwidth}
        \begin{center}
          \includegraphics[height=4.5cm]{images/Apple/644px-Apple_M1_from_Gimp.jpg}
          %% Henriok, CC0, via Wikimedia Commons
        \end{center}
      \end{minipage}
      %
      \begin{minipage}{0.49\textwidth}
        \includegraphics[height=4.5cm]{images/RISC-V/800px-Yunsup_Lee_holding_RISC_V_prototype_chip.jpg}
      \end{minipage}
    \end{center}
  }
\end{frame}

%------------------------------------------------------------------------------

\begin{frame}
\frametitle{RISC-V}

  \includegraphics[width=\textwidth]{images/RISC-V/RISC-V-logo.eps}

  \begin{itemize}
  \item
Atvira RISC tipo architektūra :)
  \item
Prieinama atvirų licenzijų pagrindu
  \item
Nereikalauja mokesčių už naudojimą
  \item
    %%BEGIN LANGUAGE lt
    Eilė kompanijų gamina arba ruošiasi gaminti aparatūrą
    (``geležį'').
    %%END LANGUAGE lt
  \item
    %%BEGIN LANGUAGE lt
    Prieinami atviro kodo įrankiai (kompiliatoriai, asembleriai, OS).
    %%END LANGUAGE lt
  \end{itemize}
  
\end{frame}

%------------------------------------------------------------------------------

\begin{frame}
\frametitle{RISC-V variantai}

  \begin{itemize}
  \item
3 galimi adreso pločiai:
    \begin{itemize}
      \item RV32
      \item RV64
      \item RV128
    \end{itemize}
    \only<1>{
    \item
Daug išplėtimo galimybių:
      \begin{itemize}
      \item I – base integer ISA
      \item M – hardware multiply and divide
      \item A – atomic synchronisation support
      \item F – single precision floating point
      \item D – double precision floating point
      \end{itemize}
    }
    \only<2>{
    \item
Egzotiškesni išplėtimai:
      \begin{itemize}
        \item S – Supervisor mode is implemented
        \item Q – Quad-precision (128 bit) floating point is supported
        \item C – Compressed (i.e., 16 bit) instructions are supported
        \item E – Embedded microprocessors, with only 16 registers
      \end{itemize}
    }
    \only<3>{
    \item
Išplėtimai ateičiai:
      \begin{itemize}
        \item L – Decimal arithmetic instructions
        \item V – Vector arithmetic instructions
        \item P – Packed SIMD instructions
        \item B – Bit manipulation instructions
        \item T – Transactional memory support
      \end{itemize}
    }
  \end{itemize}
  \transdissolve<2-3>

  \centerline{RV32G = RV32IMAFD}
  
\end{frame}

%------------------------------------------------------------------------------

\begin{frame}
\frametitle{Atmintis}

  \begin{itemize}
  \item
32, 64 arba 128 bitų virtualus adresas
  \item
Jauniausias baitas ties jauniausiu adresu (little-endian)
  \item
Palaikomas neišlygintas priėjimas prie atminties
  \item
Virtuali atmintis: puslapiavimas
  \item
Įvestis/išvestis: atvaizduota į atmintį
  \end{itemize}
  
\end{frame}

%------------------------------------------------------------------------------

\begin{frame}
\frametitle{RISC-V registrai}

  \begin{itemize}
  \item
32 bendros paskirties registrai
  \item
    %%BEGIN LANGUAGE lt
    jei palaikomi slankaus kablelio skaičiai, dar 32 slankaus kablelio
    registrai.
    %%END LANGUAGE lt
  \item
    ``it would be possible to define a non-standard subset integer
    RISC-V ISA with 16 registers'' \mycite{Waterman2014}
  \item
Registrų plotis 32, 64 arba 128 bitai (lygus adreso pločiui)
  \end{itemize}
  
\end{frame}

%------------------------------------------------------------------------------

\begin{frame}
\frametitle{RISC-V registrų rinkinys}

  \begin{center}
    \includegraphics[width=10cm,page=30,trim=3cm 14.5cm 3cm 4cm,clip]{bibliography/PDF/2016_Waterman_1c.pdf}
  \end{center}

  RV32I
Programuotojui matomi registrai
  \mycite{Waterman2016c}
  
\end{frame}

%------------------------------------------------------------------------------

\begin{frame}
\frametitle{Komandos}

  \begin{itemize}
  \item
visos pagrindinės komandos yra 32 bitų pločio
  \item
turi būti ties žodžio riba
  \item
... bet 16 bitų supakavimas gali ribą susmulkinti iki 16 bitų
  \item
    %%BEGIN LANGUAGE lt
    RV64 ir RV128 komandos taip pat 32 bitų
    %%END LANGUAGE lt
  \item
    RISC-V
yra trijų adresų mašina:

    \centerline{\tt add x4,x5,x7 \# x4 = x5 + x7}
  \item
    16-bit instructions are optionally supported to compress code (the
    ``C'' extension), but they are \textit{synonyms} of the standard
    32-bit instructions
  \end{itemize}

  \rightline{\mycite{Porter2018}}
  
\end{frame}

%------------------------------------------------------------------------------

\begin{frame}
\frametitle{Komandų formatai}

  \begin{center}
    \includegraphics[width=12cm,page=21,trim=3cm 18.5cm 3cm 5.5cm,clip]{bibliography/PDF/2014_Waterman_1.pdf}
  \end{center}

  \rightline{\mycite{Waterman2014}}

\end{frame}

%------------------------------------------------------------------------------

\begin{frame}
\frametitle{Komandų tipai}

  \begin{itemize}
  \item<1->
R-tipo instrukcijos:
    \centerline{\tt add x3,x5,x6 \# x3 = x5 + x6}
  \item<2->
I-tipo instrukcijos:
    \centerline{\tt addi x4,x6,123 \# x4 = x6+123}
    \centerline{\tt lw x4,8(x6) \# x4 = Mem[8+x6]}
  \item<3->
S-tipo instrukcijos:
    \centerline{\tt sw x4,8(x6) \# Mem[8+r6] = x4 (word)}
  \item<4->
B-tipo instrukcijos (S tipo variantas):
    \centerline{\tt blt x4,x6,loop \# if x4<x6, goto offset + pc}
  \item<5->
U-tipo instrukcijos:
    \centerline{\tt lui x4,0x12AB7 \# x4 = value<<12}
    \centerline{\tt auipc x4,0x12AB7 \# x4 = (value<<12) + pc}
  \item<6->
J-tipo instrukcijos (U tipo variantas):
    \centerline{\tt jal \# call: pc = offset + pc; x4 = ret add}
  \end{itemize}
  
\end{frame}

%------------------------------------------------------------------------------

\begin{frame}
\frametitle{Adresavimo režimai}

Tik 2 adresavimo režimai!

  \begin{itemize}
  \item
betarpiškas (operandas komandoje)
  \item
netiesioginis, naudojant registrą ir postūmį
  \end{itemize}

Betarpiškos reikšmės:

  \begin{center}
    \tt
    \parbox{0.5\textwidth}{
      \leftline{addi x5,x0,21}

      \vspace{\baselineskip}
      \leftline{lui x6,x0,0x1234}
      \leftline{addi x6,x0,0x5678 \# x6 = 0x12345678}
    }
  \end{center}
    
\end{frame}

%------------------------------------------------------------------------------

\begin{frame}
\frametitle{Atminties komandos}

  \begin{center}
    \includegraphics[width=11cm,page=35,trim=4cm 18.3cm 4cm 4cm,clip]{bibliography/PDF/2016_Waterman_1c.pdf}
  \end{center}

  \rightline{\mycite{Waterman2016c}}
\end{frame}

%------------------------------------------------------------------------------

\begin{frame}
\frametitle{x0}

  %%BEGIN LANGUAGE lt
  Registre \texttt{x0} visada yra $0$, o rašymas į šį registrą
  ignoruojamas.
  %%END LANGUAGE lt

Tarpregistrinė \texttt{MOV} komanda nebereikalinga!

  \begin{center}
    \texttt{add x6,x7,x0}
  \end{center}

naudojama vietoje
  
  \begin{center}
    \texttt{mov x6,x7}
  \end{center}

\end{frame}

%------------------------------------------------------------------------------

\begin{frame}
\frametitle{x1}

  %%BEGIN LANGUAGE lt
  Registras \texttt{x1} \textbf{pagal susitarimą} naudojamas grįžimo
  adresui, kviečiant paprogrames
  %%END LANGUAGE lt

  \vspace{\baselineskip}
Grįžimo komanda tampa tiesiog \texttt{jr x1} (Jump using Register)

  \vspace{\baselineskip}
Rekursinėms paprogramėms \texttt{x1} reikia išsaugoti steke!
  
\end{frame}

%------------------------------------------------------------------------------

\begin{frame}
\frametitle{MUL}

  \visible<1->{
    %%BEGIN LANGUAGE lt
    Jaunesnieji sandaugos bitai visada tie patys tiek dauginamiesiems
    su ženklu, tiek dauginamiesiems be ženklo $\Rightarrow$
    tereikalinga viena komanda \texttt{MUL} jaunesniajai daliai:
    %%END LANGUAGE lt

    \begin{center}
      \tt mul x4,x9,x13 \# x4 = x9*x13
    \end{center}
  }

  \visible<2->{
    %%BEGIN LANGUAGE lt
    Vyresnioji dalis skiriasi operandams su ženklu ir be ženklo, todėl
    jai reikia 3 komandų:
    %%END LANGUAGE lt

    \begin{center}
      \tt
      \leftline{
        MULH –
operandai su ženklu
      }
      \leftline{
        MULHU –
operandai be ženklo
      }
      \leftline{
        MULHSU –
vienas operandas su ženklu, kitas – be ženklo
      }
    \end{center}
  }
  
  \vspace{-\baselineskip}
  \visible<3>{
    %%BEGIN LANGUAGE lt
    Rekomenduojama operacijas vykdyti šia tvarka, tada aparatūra galės
    jas apjungti:
    %%END LANGUAGE lt

    \begin{center}
      \begin{minipage}{0.75\textwidth}
        \tt
        \leftline{mulh x4,x9,x13 \# compute upper half}
        \leftline{mul\ \ x5,x9,x13 \# compute lower half}
        \leftline{\# The product is now in the register pair x4:x5}
      \end{minipage}
    \end{center}
  }

\end{frame}

%------------------------------------------------------------------------------

\begin{frame}
\frametitle{JMP}

  %%BEGIN LANGUAGE lt
  Komanda \texttt{JMP} \textit{visada} išaugo grįžimo adresą registre
  (t.y. vienintelė komanda yra \texttt{jal}).

  \vspace{\baselineskip}
  Bet, jei šis adresas nereikalingas, kaip registrą galima nurodyti
  \texttt{x0} :)
  %%END LANGUAGE lt

  \centerline{\tt jal x0, loop}
  
\end{frame}

%------------------------------------------------------------------------------

\begin{frame}
\frametitle{Stekas. x2}

  \begin{itemize}
  \item
    %%BEGIN LANGUAGE lt
    Steko registras \textbf{pagal susitarimą} yra \texttt{x2}; stekas
    auga žemyn 16 baitų porcijomis.
    %%END LANGUAGE lt
  \item
    %%BEGIN LANGUAGE lt
    Kintamieji steke gali būti pasiekiami, naudojant nedidelius
    teigiamus poslinkius nuo \texttt{x2}
    %%END LANGUAGE lt
  \end{itemize}
  
\end{frame}

%------------------------------------------------------------------------------

\begin{frame}
\frametitle{GP: x3}

  \begin{itemize}
  \item
    %%BEGIN LANGUAGE lt
    Kvietimo susitarimas: globalūs kintamieji patalpinami viename
    atminties bloke, ir į šio bloko pradžią rodo \texttt{x3}
    %%END LANGUAGE lt

  \item
\texttt{x3} naudojamas pagal susitarimą

  \item
    %%BEGIN LANGUAGE lt
    Atskiri kintamieji pasiekiame su nedideliais poslinkiais
    \texttt{x3} atžvilgiu
    %%END LANGUAGE lt

  \item
    %%BEGIN LANGUAGE lt
    Globalių kintamųjų registras inicializuojamas programos pradžioje
    ir paprastai nekeičiamas
    %%END LANGUAGE lt
  \end{itemize}
  
\end{frame}

%------------------------------------------------------------------------------

\begin{frame}
\frametitle{Kiti registrai}

  \begin{itemize}
  \item
Registras \texttt{x4} – gijos vietiniai kintamieji
  \item
    %%BEGIN LANGUAGE lt
    Registrus x8,x9,x18-x27 turi išsaugoti \textit{iškviestoji
      paprogramė} (“s0-s11”) 
    %%END LANGUAGE lt
  \item
    %%BEGIN LANGUAGE lt
    Registrai x5-x7,x28-x31 laikomi laikinais ir paprogramės jų
    neišsaugo (“t0-t6”)
    %%END LANGUAGE lt
  \item
Registrai x10-x17 naudojami argumentams perduoti (“a0-a7”)
    \footnote{
      %%BEGIN LANGUAGE lt
      Slankaus kablelio parametrai perduodami slankaus kablelio
      registruose \texttt{fn}, jei šie yra.
      %%END LANGUAGE lt
    }
    
  \end{itemize}
  
\end{frame}

%------------------------------------------------------------------------------

\lstset{
  basicstyle=\tt\scriptsize,
  keywordstyle=\color{KwdColor},
  commentstyle=\color{CommentColor}\ttfamily,
  identifierstyle=\color{IdentifierColor},
  stringstyle=\color{StringColor},
  morecomment=[l]{\#},
  morekeywords={add,li,sltu,ecall,ebreak}
}

\begin{frame}
\frametitle{Pavyzdys: daugelio žodžių sudėtis}

  \only<1>{
    \lstinputlisting[language=bash,morekeywords={add,li,sltu,ecall,ebreak}]{examples/RISC-V/RARS/multiprecision-add-with-SLTU.asm}
  }
  \only<2>{
    \lstinputlisting[language=bash,morekeywords={add,li,sltu,ecall,ebreak}]{examples/RISC-V/RARS/multiprecision-add-with-BGEU.asm}
  }
  \transdissolve<2>

\end{frame}

%------------------------------------------------------------------------------

\begin{frame}%%[allowframebreaks]
\frametitle{Šaltiniai}

  \setmainfont{Liberation Serif}
  \renewcommand{\bibfont}{\scriptsize}
  \printbibliography

\end{frame}

%------------------------------------------------------------------------------                                                                                                          
\end{document}
% 2020-12-14 20:14:58 EET
